Title Issue Date
Abeto: An automated benchmarking tool to manage heterogeneous IP core databases Sánchez Clemente, Antonio José ; Barrios Alfaro,Yubal ; Santos Falcón, Lucana ; Sarmiento Rodríguez, Roberto Issued date: 2024 DOI: 10.1016/j.micpro.2023.104987 Source: Microprocessors and Microsystems [ ISSN 0141-9331], v. 104, 104987, (Febrero 2024) SJR: 0,488 - Q2 JCR: 2,6 - Q2 SCIE MIAR ICDS: 11,0 Artículo
Removing Data Dependencies in the CCSDS 123.0-B-2 Predictor Weight Updating Barrios Alfaro,Yubal ; Bartrina-Rapestà, Joan; Hernández-Cabronero, Miguel; Sánchez Clemente, Antonio José ; Blanes, Ian, et al Issued date: 2024 DOI: 10.1109/LGRS.2024.3362376 SJR: 1,284 - Q1 JCR: 4,8 - Q1 SCIE MIAR ICDS: 10,7 Artículo
Reducing Data Dependencies in the Feedback Loop of the CCSDS 123.0-B-2 Predictor Sanchez Clemente, A. J. ; Blanes, Ian; Barrios Alfaro, Yubal ; Hernandez-Cabronero, Miguel; Bartrina-Rapesta, Joan, et al Issued date: 2022 DOI: 10.1109/LGRS.2022.3213975 Source: IEEE Geoscience and Remote Sensing Letters[ISSN 1545-598X], (Enero 2022) SJR: 1,284 - Q1 JCR: 4,8 - Q1 SCIE MIAR ICDS: 10,7 Artículo
Abeto framework: a Solution for Heterogeneous IP Management Sánchez Clemente, Antonio José ; Barrios Alfaro,Yubal ; Ventura Henríquez,Diego ; Sarmiento Rodríguez, Roberto Issued date: 2022 DOI: 10.1109/DSD57027.2022.00101 Source: 25th Euromicro Conference on Digital System Design (DSD), Maspalomas, Spain, 2022 Actas de congresos
A lossless compression solution for SCIP and TuMag instruments aboard of SUNRISE III balloon-borne Solar Observatory Sánchez, Antonio ; Barrios Alfaro,Yubal ; Sarmiento Rodríguez, Roberto ; Hernández Expósito, David; Sánchez Gómez, Antonio Issued date: 2022 DOI: 10.1109/DCIS55711.2022.9970132 Source: 37th Conference on Design of Circuits and Integrated Circuits (DCIS), Pamplona, Spain, 2022, p. 01-06, (2022) Actas de congresos
Hardware implementation of the ccsds 123.0-b-2 near-lossless compression standard following an hls design methodology Barrios Alfaro, Yubal ; Sánchez, Antonio ; Guerra, Raúl ; Sarmiento, Roberto Issued date: 2021 DOI: 10.3390/rs13214388 Source: Remote Sensing [EISSN 2072-4292], v. 13 (21), 4388, (Noviembre 2021) SJR: 1,283 - Q1 JCR: 5,349 - Q1 SCIE MIAR ICDS: 10,6 Artículo
EDAC implementation on a data lossless compressor compliant with the CCSDS 121.0-B-3 standard Ventura Henríquez, Diego ; Barrios Alfaro, Yubal ; Sánchez Clemente, Antonio José ; Sarmiento, Roberto Issued date: 2021 DOI: 10.1109/DCIS53048.2021.9666189 Source: 36th Conference on Design of Circuits and Integrated Systems, DCIS 2021[EISSN 2640-5563], (Enero 2021) Actas de congresos
SHyLoC 2.0: a versatile hardware solution for on-board data and hyperspectral image compression on future space missions Barrios Alfaro, Yubal ; Sánchez Clemente, Antonio José ; Santos, Lucana ; Sarmiento, Roberto Issued date: 2020 DOI: 10.1109/ACCESS.2020.2980767 Source: IEEE Access [ISSN 2169-3536],v. 8, p. 54269-54287 SJR: 0,587 - Q1 JCR: 3,367 - Q2 SCIE Artículo
Reliability analysis of the shyloc ccsds123 ip core for lossless hyperspectral image compression using cots FPGAs Aranda, Luis Alberto; Sánchez Clemente, Antonio José ; Garcia-Herrero, Francisco; Barrios Alfaro, Yubal ; Sarmiento, Roberto , et al Issued date: 2020 DOI: 10.3390/electronics9101681 Source: Electronics (Switzerland) [EISSN 2079-9292], v. 9 (10), 1681, (Octubre 2020) SJR: 0,36 - Q2 JCR: 2,397 - Q3 SCIE Artículo
Lossy hyperspectral image compression on a reconfigurable and fault-tolerant fpga-based adaptive computing platform† Barrios Alfaro, Yubal ; Rodríguez, Alfonso; Sánchez Clemente, Antonio José ; Pérez, Arturo; López, Sebastián , et al Issued date: 2020 DOI: 10.3390/electronics9101576 Source: Electronics (Switzerland)[EISSN 2079-9292],v. 9 (10), p. 1-23, (Octubre 2020) SJR: 0,36 - Q2 JCR: 2,397 - Q3 SCIE Artículo
Reconfigurable video processor for space Armesto Caride, L.; Rodríguez, A; Pérez Garcia, A.; Sáez, S.; Valls, J., et al Issued date: 2019 DOI: 10.1007/978-3-030-14628-3_18 Source: Validation and Verification of Automated Systems: Results of the ENABLE-S3 Project / Leitner A., Watzenig D., Ibanez-Guzman J. (eds), p. 231-249, (Enero 2019) itemlist.container.dc.description.spiq Q1 Capítulo de libro
Evaluation of TMR effectiveness for soft error mitigation in SHyLoC compression IP core implemented on Zynq SoC under heavy ion radiation Sánchez Clemente, Antonio José ; Barrios Alfaro, Yubal ; Santos, Lucana ; Sarmiento, Roberto Issued date: 2019 DOI: 10.1109/DFT.2019.8875281 Source: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019 Actas de congresos
Approximate TMR for selective error mitigation in FPGAs based on testability analysis Sánchez Clemente, Antonio José ; Entrena, Luis; Kastensmidt, Fernanda Issued date: 2018 DOI: 10.1109/AHS.2018.8541485 Source: 2018 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2018, p. 112-119 Actas de congresos
Hardware Implementation of the CCSDS 123.0-B-1 lossless multispectral and hyperspectral image compression standard by means of high level synthesis tools Barrios Alfaro, Yubal ; Sánchez Clemente, Antonio José ; Santos, Lucana ; Lopez, Sebastian ; Lopez, Jose Fco , et al Issued date: 2018 DOI: 10.1109/WHISPERS.2018.8747258 Source: Workshop on Hyperspectral Image and Signal Processing, Evolution in Remote Sensing [ISSN 2158-6276],v. 2018-September Actas de congresos
Improving approximate-TMR using multi-objective optimization genetic algorithm Albandes, I.; Serrano-Cases, A.; Sánchez Clemente, Antonio José ; Martins, M.; Martinez-Alvarez, A., et al Issued date: 2018 DOI: 10.1109/LATW.2018.8349665 Source: Latin American Test Workshop, LATW, p. 1-6 Actas de congresos
Error Mitigation Using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches Sánchez Clemente, Antonio José ; Entrena, Luis; Hrbacek, Radek; Sekanina, Lukas Issued date: 2016 DOI: 10.1109/TR.2016.2604918 Source: IEEE Transactions on Reliability [ISSN 0018-9529], v. 65(4), p. 1871-1883, (Diciembre 2016) SJR: 1,335 - Q1 JCR: 2,79 - Q1 SCIE Artículo
Partial TMR in FPGAs Using Approximate Logic Circuits Sánchez Clemente, Antonio José ; Entrena, L.; Garcia-Valderas, M. Issued date: 2016 DOI: 10.1109/TNS.2016.2541700 Artículo
Using Benchmarks for Radiation Testing of Microprocessors and FPGAs Quinn, H; Robinson, WH; Rech, P; Aguirre, M; Barnard, A, et al Issued date: 2015 DOI: 10.1109/TNS.2015.2498313 SJR: 0,924 - Q1 JCR: 3,711 - Q1
Error masking with approximate logic circuits using dynamic probability estimations Sánchez Clemente, Antonio José ; Entrena, L.; Garcia-Valderas, M. Issued date: 2014 DOI: 10.1109/IOLTS.2014.6873685 Artículo
Logic masking for SET Mitigation Using Approximate Logic Circuits Sánchez Clemente, Antonio José ; Entrena, L.; Garcia-Valderas, M.; Lopez-Ongil, C. Issued date: 2012 DOI: 10.1109/IOLTS.2012.6313868 Source: Proceedings of the 2012 IEEE 18th International On-Line Testing Symposium, IOLTS 2012 Artículo

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